buffer circuit meaning in English
缓冲电路
Examples
- Simulation research and analysis on undeland buffer circuit
缓冲电路分析及仿真研究 - The main electric circuit uses integration microprocessor and ic , few buffer circuit for stable operation
主要功能电路采用集成度很高的单片机，外围电路很少，工作更加稳定。 - The hardware of the system is composed of a high - speed optical - isolator circuit , a first - in / first - out dual - port memory buffer circuit , a pci interface chip ql5032 , and a logic control circuit
系统的硬件部分是由高速光电隔离电路，双端口fifo存储缓冲电路， pci总线接口电路ql5032及逻辑控制电路等组成。 - The push - pull mode switch power supply is chosen as the main circuit of the other voltages with pwm control circuit , over - current protection circuit , insulated drive circuit , mosfet buffer circuit and so on
采用高效的推挽式电路作为中低压电源的主电路，并以pwm控制电路、隔离式驱动电路、过流保护电路、 mosfet缓冲电路、软启动电路、稳压电路等作为辅助电路。 - Concretely , on the basis of describing the communication specification of arinc 429 with enhanced parallel port ( epp ) , the standard and the module application of dsp and cpld , the thesis has proposed the design of the arinc 429 technology based on dsp system . at first , the function and the application of each module of the system and the operation principle of high - performance cmos bus interface circuit hs - 3282 chip which forms the main body of the data diversion of the interface module are introduced . secondly , the hardware structure of the interface module is described in detail , mainly including data latch and buffer circuit , choice circuit of transmission rate , etc . and then the design philosophy and flow charts of the software are fully discussed , such as the basic requirement of software , the design and realization of the function
本文在简单的论述了pc并口协议( epp )与dsp之间的通信方法、 cpld模块逻辑控制应用和arinc429的通讯规范的基础上,给出了基于dsp的arinc429通讯接口的设计方案:对通讯板中各模块的功能和应用以及构成数据转换主体的总线接口芯片hs - 3282的工作原理做了说明;介绍了本设计所用的dsp和cpld的功能概况;详细叙述了通讯板接口模块的硬件结构设计,其中,对数据缓冲电路、数据传输速率选择电路、逻辑控制电路等各关键点做了重点介绍;具体阐述了软件设计思想及流程图,包括软件的基本要求和功能的设计与实现;接着从端口译码单元、 i / o通道、电平转换电路等方面进行了接口模块的软、硬件调试;最后,给出了测试结果,对研制工作做了总结,对本设计的优缺点各做了评述。